Trench gate type semiconductor devices (MOSFET: metal oxide semiconductor field effect transistor) having a gate electrode formed in a trench (groove) have conventionally been known (see, for example, Patent Document 1).
FIG. 15 is a sectional view showing the structure of the conventional trench gate type MOSFET disclosed in the above-mentioned Patent Document 1. As shown in FIG. 15, in the conventional trench gate type MOSFET, a common drain region 102 is formed in a surface layer of a semiconductor substrate 101 by an epitaxial growth method. In a surface layer of the common drain region 102, a channel layer 103 is formed by impurity diffusion. In part of a surface layer of the channel layer 103, a source region 104 is formed by impurity diffusion. A trench 105 is formed to penetrate the common drain region 102 and the channel layer 103. The trench 105 is structured such that the bottom surface and side surfaces (side walls) each have the (100) direction. A gate dielectric film 106 is formed on the inner wall (bottom and side surfaces) of the trench 105, and a gate electrode 107 is formed on the gate dielectric film 106 so as to fill the trench 105.    Patent Document 1: JP-A-H10-154810